Pipelining (pipeline processing) summary and conclusions:

everyday example of pipelining: doing laundry (3 stage pipeline)

(note that most pipelines have 5 stages, and sometimes up to 8 as in the R4000, rather than 3, but this example provides the general idea) preferably the three stages of the pipeline should take approximately the same time (e.g. same number of clock cycles).

for example, if dryer takes substantially longer than washer, it creates a bottleneck.
this creates an incentive for manufacturer to make faster dryers, but less incentive for speeding up washers.

market forces tend toward creating components that function like a RISC processor.

pipelining in nonRISC microprocessors

example of another form of pipelining: pipeline SRAM cache for DRAM

again, another example of nonRISC pipelining

a 6502 microprocessor has a throughput approximately equal to an 8080 processor running at 4 times the clock speed. this was due to the pipelined architecture of the 6502 versus the non-pipelined 8080.
EYE86 David Eyes, Ron Licht Programming the 65816 1986, Brady Book, p 40-1.

paraphrased from Tony Wesley awesley@ibm.net

http://www.acs.oakland.edu/~awesley/p_cite.htm#EYE86

NOT ALL PIPELINED PROCESSORS ARE RISC